Senior Packaging Engineer (Silicon Photonics) – Cisco – San Jose, CA

You’ll drive optoelectronic packaging process development, package level test, reliability data collection and process qualification at Cisco’s assembly supply chain. You’ll be responsible for new process bring up from proof of concept through NPI stage, including troubleshooting critical issues and driving scale up activities. You will own reviewing process monitoring data, including yield and Cpks and correlate impact to downstream module level assembly quality, performance and reliability.

You’ll also play a critical role in driving future optical and electrical I/O densities and advanced packaging architectures to enable next generation Silicon Photonics products.

Minimum

requirements for this role include an MS or PhD in Materials Science,

Mechanical Engineering, Electrical Engineering or related fields with 7+

years experience in CMOS or Photonics packaging and assembly process

development and qualification.

Experience working with CMOS/Optical packaging

suppliers, especially semiconductor OSATs is highly desirable.

The ideal

candidate will also have experience with statistical data analysis, FMEAs and

5M problem solving. The candidate should have an established record of

product development leadership resulting in yield improvements and

successfully troubleshooting issues in a manufacturing environment.

Desired skills include a deep understanding of semiconductor or Photonics

packaging processes, including current advanced wafer scale packaging

technologies. Some experience with developing silicon photonics packaging

technologies and taking them to high volume scale up would be a big plus. The

candidate would be a great team player, with ability to collaborate with

multiple geographically located internal and external teams toward achieving

common goals.