2,314 reviews –
Santa Clara, CA 95052
The Sr. CAD Layout Engineer will be responsible for enabling flows and methodologies for Optical and IC PDK Designs for Intel’s Silicon Photonics Division while being a part of a centralized team under NVM Solutions Group. The qualified CAD candidates will be responsible to develop, validate/QA and support the custom layout collateral portion of the Optical and Foundry Process Design Kit PDK. Primary responsibilities will focus on writing and supporting the caliber/Assura DRC/LVS rule file, Develops and applies computer aided design CAD software engineering methods, theories and research techniques in the investigation and solution of technical DRC/LVS problems. The candidate will be responsible for developing and managing the design rule document, Electronic Design Automation EDA tools/flows and platforms to ensure high-quality delivery of kit content to customers.
Non-Volatile Solutions Memory Group: The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices. The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.
Other jobs you may like